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Description: -- DESCRIPTION : Shift register
-- Type : univ
-- Width : 4
-- Shift direction: right/left (right active high)
--
-- CLK active : high
-- CLR active : high
-- CLR type : synchronous
-- SET active : high
-- SET type : synchronous
-- LOAD active : high
-- CE active : high
-- SERIAL input : SI-- DESCRIPTION: Shift register- Type: univ- Width: 4- Shift direction: right/left (right active high )---- CLK active: high- CLR active: high- CLR type: synchronous-- SET active: high- SET type: synchronous- LOAD active: high- CE active: high- SERIAL input: SI
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Size: 1024 |
Author: sanshanchuns |
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Description: 实现产生伪随机序列的部件 —— 线性反馈移位寄存器单元。 SFlog2为扩频因子的底数为2的对数值,cycle为PN序列的周期,其值为2^SFlog2。initial_state为移位寄存器的初始状态,generator_polynomial_coefficient为生成PN序列所需的本原多项式,对应于移位寄存器的连接向量。-The realization of pseudo-random sequence generated components- LFSR unit. SFlog2 factor for the spread-spectrum base 2 of value, cycle for the PN sequence cycle, its value is 2 ^ SFlog2. initial_state shift register for the initial state, generator_polynomial_coefficient to generate the necessary PN sequence primitive polynomial, corresponding to the shift register connection vector.
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Size: 1024 |
Author: fisher |
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Description: shift register
it is shifte register for vhdl coding
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Size: 201728 |
Author: han |
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Description: If you have not registered, Please [regist first].You should upload at least five sourcecodes/documents. (upload 5 files, you can download 200 files).
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Size: 3072 |
Author: alpha |
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Description: easy to descriotion .i want a file about mean shift so i have to regist a name for this ,please help me.
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Size: 823296 |
Author: dazhao |
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